During system characterization or chip testing, for example, it is desirable to trace some on-chip vital signals for consecutive cycles. In order to log these signal values on a cycle-by-cycle basis for typically thousands of cycles, a dedicated Trace Array is conventionally used. Since the Trace Array is generally only used in the test mode, it is considered to be overhead to the chip real estate. The ability to trace internal ASIC signals and busses in a “system on a chip” environment is increasingly important when embedded processors are involved in order to provide the capability to trace processor I/O operations as they relate to other events within the system.